LTC4253ACGN#TRPBF【PDF 21/34 页】IC HOT SWAP CONTRLR -48V 16-SSOP

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LTC4253/LTC4253A

425353aff

For more information www.linear.com/4253

Computing the maximum soft-start capacitor value during

soft-start to a load short is complicated by the nonlinear

MOSFETs SOA characteristics and the R

response.

An overconservative but simple approach begins with the

maximum circuit breaker current, given by:

CB(MAX)

(14)

where V

CB(MAX)

is 60mV (55mV for the LTC4253A).

From the SOA curves of a prospective MOSFET , determine

the time allowed, t

SOA(MAX)

. C

is given by:

SOA(MAX)

0.916 R

for the LTC4253

SOA(MAX)

2.48 R

for the LTC4253A

(15)

In the above example, 60mV/40m?gives 1.5A. t

SOA

for

the IRF530S is 40ms. From Equation (15), C

= 437nF .

Actual board evaluation showed that C

= 100nF was ap-

propriate. The ratio ( R

) to t

CL(CHARGE)

is a good

gauge as large ratios may result in the time-out period

expiring prematurely. This gauge is determined empirically

with board level evaluation.

SUMMARY OF DESIGN FLOW

To summarize the design flow, consider the application

shown in Figure 3 for the LTC4253A. It was designed for

80W and C

??00礔 .

Calculate maximum load current: 80W/43V = 1.86A;

allowing for 83% converter efficiency, I

IN(MAX)

= 2.2A.

Calculate R

: from Equation (8) R

= 20m?

Calculate I

SHORT-CIRCUIT(MAX)

: from Equation (10)

SHORTCIRCUIT(MAX)

= 3.3A.

Select a MOSFET that can handle 3.3A at 71V: IRF530S.

Calculate C

: from Equation (13) C

= 302nF . Select

?=?680nF , which gives the circuit breaker time-out

period t

MAX

= 5.9ms.

Consult MOSFET SOA curves: the IRF530S can handle 3.3A

at 100V for 8.3ms, so it is safe to use in this application.

Calculate C

: using Equations (14) and (15) select

??3nF .

FREQUENCY COMPENSATION

The LTC4253 typical frequency compensation network

for the analog current limit loop is a series R

(10?

and C

connected from GATE to V

. Figure 6 depicts the

relationship between the compensation capacitor C

and

the MOSFETs C

ISS

. The line in Figure 6 is used to select

a starting value for C

based upon the MOSFETs C

ISS

specification. Optimized values for C

are shown for sev-

eral popular MOSFETs. Differences in the optimized value

of C

versus the starting value are small. Nevertheless,

compensation values should be verified by board level

short-circuit testing.

As seen in Figure 5, at the onset of a short-circuit event,

the input supply voltage can ring dramatically due to series

inductance. If this voltage avalanches the MOSFET , current

continues to flow through the MOSFET to the output. The

analog current limit loop cannot control this current flow

and therefore the loop undershoots. This effect cannot be

eliminated by frequency compensation. A Zener diode is

required to clamp the input supply voltage and prevent

MOSFET avalanche.

Figure 6. Recommended Compensation

Capacitor C

vs MOSFET C

ISS

for the LTC4253

MOSFET C

ISS

(pF)

4253 F06

2000

4000

6000

8000

IRF530

IRF540

IRF740

IRF3710

NTY100N10

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